Via connectors are widely used in the electronic industry for making electrical connections between the opposite surfaces of electronic devices. For example, in the manufacture of printed circuit board assemblies it is common practice to place discrete electronic components on one surface of a printed circuit board and to form the required connecting circuitry, ground planes, or the like on the opposite surface with the required electrical connections being made through the printed circuit board by using plated through holes or by various other techniques well known to those skilled in the printed circuit board art.
In the fabrication of semiconductor devices, it is also often desirable to form solid state electronic component on one surface of the semiconductor wafer of the device, connecting circuitry, ground planes and the like on the opposite surface of the semiconductor wafer and then to provide electrical connections between the elements on the two surfaces. For example, in the manufacture of microwave devices, it is often desirable to form a field effect transistor or a diode on one surface of a semiconductor wafer, a microstrip, heat sink, ground plane, or the like, on the opposite surfaces of the wafer and then to provide the required electrical connection between the surfaces with a via connector.
The problems of making the required via connectors in semiconductor devices are substantially more difficult than that of forming of plated through holes or the like in printed circuit board assemblies. One of the principle reasons for the increased difficulty in forming via connectors in semiconductor devices is that the applicable design rules used for semiconductor devices require substantially smaller dimensions. The printed circuit board typically used in the electronic art are generally between an 1/8" (0.3175 cm) and a 1/4" (0.635 cm) in thickness. Printed circuit boards are also generally relatively large in surface area with boards 8" (20.32 cm) by 10" (24.54 cm) being relatively commonly used with often much larger size boards being utilized for example in television sets and the like. Because of the relatively large size of printed circuit board assemblies and the considerable space between the discrete electronic element of the printed circuit board assemblies, the apertures made through the printed circuit board can be relatively large, with typically the diameter of the via holes being about 1/16" (0.159 cm) to 1/8" (0.3175 cm) in diameter or larger. Because of the relatively large size of the apertures which can be formed in printed circuit boards, it is relatively simple to form the required via connectors in the printed circuit boards. By way of comparison, semiconductor devices are, for an equivalent type of electronic devices, orders of magnitude smaller than that of the printed circuit board assemblies. For these reasons, the applicable design rules for semiconductor devices restrict the amount of area on the surface of the wafer which can be utilized for via connectors. While there is no stated size limitation with regard to the diameter of the via conductors for semiconductor devices they are typically only about 1 mil (0.00254 cm) in diameter in order not to consume excessive amounts of the surface area of the semiconductor device. The small diameter of the via connectors required for semiconductor devices makes it extremely difficult to consistently form satisfactorily via connectors. The problems of the small via hole diameter is further complicated by the fact that the wafer through which the via connector must be formed is typically, for example, 10 mils (0.0254 cm) in thickness so the via connector is required to be formed with a length to diameter aspect ratio of 10 to 1. This high aspect ratio makes it considerably more difficult to form a continuous low resistance via connector as compared to the 1 to 1 or 2 to 1 length to diameter ratios typically encountered when forming via connectors in printed circuit boards.
Various methods have heretofore been suggested for forming via connectors in semiconductor devices. One such method is disclosed in Decker et al. in U.S. Pat. No. 3,986,196--THROUGH SUBSTRATE SOURCE CONTACTS FOR MICROWAVE FET. In the method disclosed by Decker et al., various electronic components are initially formed on one surface of a semiconductor wafer. Thereafter, the opposite surface of the wafer is coated with a photoresist, exposed and developed to provide an etchant mask with holes defined therein which should be aligned with the circuit components on the opposite side of the semiconductor wafer. Thereafter, an etchant is used to form via holes through the wafer. Metallization is then applied to form the desired via connectors. Chemical etching processes such as those disclosed in Decker et al., have not, however, proven to be completely satisfactory. Considerable problems are encountered in precisely aligning the holes formed in the photoresist so that during exposure and development, the holes will be in alignment with electronic components on the opposite side of the wafer. Furthermore, the chemical etching of the via apertures causes significant undercutting of the wafer material. The extent of undercutting that is encountered is typically proportional to the depth of the etch hole so that, for example, when attempting to etch a 1 mil hole in a 4 mil wafer, it is not uncommon to have 4 or 5 mils of undercutting in the wafer. A further problem that is encountered with chemcial etching is if there are a plurality of holes etched in the wafer, the etching is typically not uniform so that the resulting holes will vary substantially in size.
In order to overcome the problems encountered with the chemical etching processes, it was suggested to laser drill the via holes in the wafer. It was found, however, that in practice with certain types of wafers, particularly those having circuit components formed on one surface of the semiconductor wafer, that the laser drilling caused considerable damage to the surface of the wafers, and particularly to the electronic components formed on the surface.
In Subbarao et al. U.S. Pat. No. 4,348,253--METHOD FOR FABRICATING VIA HOLES IN A SEMICONDUCTOR WAFER there is disclosed an improved method for forming via connectors using laser drilling. Subbarao et al. uses a process wherein a layer of a photoresist is applied on the surface of a semiconductor wafer on which a layer of electronic components is formed. The layer of photoresist is then patterned so as to have apertures defined in the photoresist where the via holes are to be laser drilled. The via holes are then drilled through the wafer and the layer of photoresist is used in the process to protect electronic components formed on the surface of the wafer. Subbarao et al. then discloses depositing a metallic layer on the side of the wafer opposite the one on which the electronic components are formed. The wafer is then secured to an adhesive non-porous dielectric layer of material which in turn is secured to the cathode plate of electroforming apparatus in such a manner that the laser drilled holes drilled in the semiconductor device are in effect dead ended. Then, according to Subbarao et al., an electrical connection is then made between the cathode plate and the deposited metal layer on the surface opposite the surface with the electronic components using a material such as silver paste or the like. The entire assembly is subjected to the electroforming which results in the formation of via connectors in the laser drilled via holes.
The method disclosed by Subbarao et al. was found to be a substantial improvement in the art with regard to forming via connectors in semiconductor devices. However, the Subbarao et al. process was still found to have certain serious disadvantages. The main problem with that the control of the process conditions was highly critical in that if the current density or other process parameters exceeded critical amounts, the via holes would then tend to plate over the exposed ends of the via holes before the via connectors were completely formed. The discontinuities in the electroforming resulted in voids in the via connectors which then caused opens or high resistence via connectors.
What would be highly desirable would be a method for forming via connectors in semiconductor wafers which would be both simple to perform and which would consistently produce via connectors of a uniform low resistivity.